write_file:
        PUSH    {R0-R6,LR} ; R0 = byte, R1 = offset
        SUB     SP, SP, 4
        ADD    R5, R0, 0
        ADD    R6, R1, 0
        MOV    R0, 0
        PUSH    {R0}
        MOVL    R3, 0x180
        MOV    R2, 2
        ADR    R1, filename
        LDR    R0, path
        BL    __fopen
        ADD    R4, R0, 0
        ADD    R1, R6, 0
        MOV    R2, 0
        BL    _lseek
        ADD    R0, R4, 0
        MOV    R1, SP
        STRB    R5, [R1]
        MOV    R2, 1
        BL    _fwrite
        ADD    R0, R4, 0
        BL    _fclose
        ADD    SP, SP, 8
        POP    {R0-R6,PC}

BX 
BX <Rm>
    PC:= Rm & 0xFFFFFFFE
    T = Rm[0]
Переход по адресу в Rm с возможной сменой набора команд на ARM.
 Если младший бит адреса == 0, происходит смена набора команд,
 при этом недопустим переход на адрес не выравненный кратно четырем.
Применимы регистры R0-R14.
    ldr r0,=address;
     bx  r0;

include "x.inc"
branch      equ    0x10deeebc
hook        equ    0x126a6f80
address1    equ    0x10DEF08A+1
address2    equ    0x11DA58A0 
address3    equ    0x119E01B8+1 
address4    equ    0x119DE688+1 
address5    equ    0x10C86AE9  
address6    equ    0x10FA7999   
address7    equ    0x10DF01F4+1 
address8    equ    0x10E139A5

org 0x10deee68
                       BEQ      branch

org 0x10deeebc
                       LDR     R3, off_10DEEEC0
                       BX      R3

 off_10DEEEC0    DCD hook

org 0x126a6f80

loc_126A6F80:                          
                                                    
                       PUSH    {R4}
                       LDR     R3, off_126A6FD4
                       BLX     R3
                       CMP     R0, 0
                       BNE     loc_126A6FB8
                       LDR     R0, off_126A6FD8
                       LDR     R3, off_126A6FE0
                       BLX     R3
                       CMP     R0, 0
                       BNE     loc_126A6FB8
                       LDR     R0, off_126A6FDC
                       LDR     R3, off_126A6FE0
                       BLX     R3
                       CMP     R0, 0
                       BNE     loc_126A6FB8
                       LDR     R0, off_126A6FE4
                       LDR     R3, off_126A6FE0
                       BLX     R3
                       CMP     R0, 0
                       BNE     loc_126A6FB8
                       ADR     R1, aSlideropen_mp3 
                       CMP     R4, 0x4D
                       BEQ     loc_126A6FB0
                       ADR     R1, aSliderclose_mp 

loc_126A6FB0:                           
                       LDR     R0, off_126A6FCC
                       MOV     R2, 0x48
                       LDR     R3, off_126A6FD0
                       BLX     R3

loc_126A6FB8:                           
                                                    
                       POP     {R4}
                       MOV     R0, 0x35
                       CMP     R4, 0x4E
                       BNE     loc_126A6FC2
                       MOV     R0, 0x36

loc_126A6FC2:                           
                       LDR     R3, off_126A6FC8
                       BX      R3
     
 align 4
 off_126A6FC8    DCD  address1                      
 off_126A6FCC    DCD  address2     
 off_126A6FD0    DCD  address3     
 off_126A6FD4    DCD  address4     
 off_126A6FD8    DCD  address5        
 off_126A6FDC    DCD  address6       
 off_126A6FE0    DCD  address7    
 off_126A6FE4    DCD  address8
        
aSlideropen_mp3 du "slideropen.mp3",0
 align 4
aSliderclose_mp du "sliderclose.mp3",0